Hi dear all,
I (mis-)use the BLOG to let you know that I will be busy from February, 2009 until end of April for consulting activities.
Alex
New engagement…
January 24th, 2009We are growing!!
September 3rd, 2008Hi dear all,
as usual, I misuse somehow the blog feature of my hosting plan to communicate some news to you!
I would like to inform you that we are growing:
starting from July 2008 two new colleagues joined the group (calling it a “company” seems to me a little too much, at this point!):
Michele Checchinato, which is finishing his diploma thesis with us and
Matteo De Luigi, that joined immediately after graduation.
The two guys are working on a specman-based verification environment for the ALU unit of a publicly available CPU core, the pretty well known LEON3 of Gaisler Research.
The design is coded in VHDL, and the specman environment will be made in observation to the rules and architectural guidelines of the e reuse methodology (eRM) of Cadence.
We expect in particular Matteo to be available for consulting jobs at customer sites after this activity has finished (it will be around October or November 2008), so…
if you need a specman- knowledged and VHDL-knowledged consultant, dont hesitate to contact us!
Kind Regards,
Alex
First post
February 1st, 2006Please use this category for VHDL-related issues, questions and suggestions
First post
February 1st, 2006Please use this category for Verilog-related questions, issues and suggestions
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February 1st, 2006Please use this category for SystemC-related questions, issues and suggestions.
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February 1st, 2006Please use this category for methodic-related questions and suggestions.
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February 1st, 2006Hi dear all, please use this category for what doesn’t fit in the other most specific categories.